入门级教程
入门级教程
【Vitis Accel】1 - HLS 简介_pudding_code的博客-CSDN博客
Vitis Accel - HLS 简介
Vitis HLS is a high-level synthesis tool that allows C, C++, and OpenCL functions to become hardwired onto the device logic fabric and RAM/DSP blocks. Vitis HLS implements hardware kernels in the Vitis application acceleration development flow and uses C/C++ code for developing RTL IP for Xilinx device designs in the Vivado Design Suite.
Fork/Join 框架介绍

Design Flow
https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/vitis_hls_coding_styles.html#pdd1539734241607
Vitis HLS Coding Styles
Vivado-hls使用实例-详细教程_塔克拉玛与大兴安岭的博客-CSDN博客_hls vivado
入门流程